1. Field of the Invention
The present invention relates to a testing device and a testing method for testing an electronic device. More particularly, the present invention relates to a testing device and a testing method for supplying an input signal with jitter applied thereto to an electronic device to perform a test of the electronic device.
2. Description of the Related Art
Jitter test is an important test to serial communication devices and serial I/O devices. For example, recommendations by International Telecommunication Union, Bellcore or the like define jitter tolerance, jitter generation and measurement of jitter transfer function. Especially, jitter tolerance test is important because it can estimate operating limits of a device to jitter applied in a transfer medium. Please note that the measurement of jitter tolerance changes an amplitude of jitter applied to an input signal of a device and measures a threshold value of the amplitude of the applied jitter which starts to cause the device to generate a bit error.
FIGS. 1A-1C illustrate conventional measurement of jitter tolerance. The conventional measurement of jitter tolerance applies random jitter to an input signal, that is shown in FIG. 1A, by superposing a white noise shown in FIG. 1B on the input signal. The input signal with the random jitter applied thereto is shown in FIG. 1C. The input signal with the random jitter applied thereto is supplied to an electronic device and a measurement is performed for determining whether or not a bit error occurs in the electronic device.
FIG. 2 illustrates a structure of a conventional jitter application device 200 for applying jitter to an input signal. To the input signal generated by a pattern generator 202, a sinusoidal jitter is applied by a sinusoidal jitter source 206 and deterministic jitter and random jitter are further applied by a deterministic jitter source 208 and a random jitter source 212. The amount of jitter applied to the input signal is adjusted by adjusting the amplitudes of the random jitter and sinusoidal jitter. Then, a limiting amplifier 214 amplifies the input signal and clips components having amplitudes that are equal to or larger than a predetermined amplitude and are equal to or smaller than another predetermined amplitude. After clipping, the signal is output.
FIGS. 3A-3C illustrates an operation of the limiting amplifier 214. To the limiting amplifier 214, an input signal shown in FIG. 3A is supplied. This input signal contains amplitude modulation components because random jitter was applied to the signal.
The limiting amplifier 214 removes amplitude components equal to or larger than the first threshold value and amplitude components equal to or smaller than the second threshold value from the input signal, as shown in FIG. 3B, thereby reducing the amplitude modulation components. However, the limiting amplifier 214 cannot remove the amplitude modulation components in ranges where the amplitude components are equal to or smaller than the first threshold value and are equal to or larger than the second threshold value. In order to measure jitter tolerance of an electronic device, it is necessary to supply an input signal with no amplitude modulated component, as shown in FIG. 3C, to the electronic device for detecting a bit error rate caused only by a jitter component in a phase direction. However, in the conventional jitter application device 200, the amplitude modulated components remain in the input signal, as shown in FIG. 3B. Thus, according to the conventional technique, a bit error caused by those amplitude modulation components is also detected. This results in underestimation of jitter tolerance of the electronic device. Moreover, the conventional jitter application device 200 includes three jitter sources, i.e., the sinusoidal jitter source 206, deterministic jitter source 208 and random jitter source 212. Thus, the cost of the device increases.